Flush Error Reporting Log
Report New Log Entry
Eror Log Port Disabled
Error Log Port Enbled
Send event Log
Invalid Error Log pointer - Skipping send
Error Reporting waiting for ACK
#F8h|J
KFrJH2
F3F*FIFGn F
G3F*FIF F
KF@JH2
ABL - Error reported
ABL - Skip Conditon: No Memory detected on local die
ABL - ALERT Condition: %x, DataA: %x, DataB: %x
OLOM h
Err Port Disabled
Send ABL Error Log
Error Log transmission start
Error Log transmission End
3FAF8F
Error Reporting waiting for ACK
Slave: ABL, HALT due to Error
AimtAfterDeviceInit Entry
Locate HEAP failed
AimtAfterDeviceInit Exit
AmdMpioEarly - START
SRAM Destination is %x
P Svc_LoadBinary Status %d
E32PHYAddress is %x
Save the E32PHYAddress for S3 resume path (Status %x)
ABL BP[%04x]
ABL BP: Fail to locate AMD_APCB_BREAKPOINT_CONTROL_HANDLE
ABL BP[%04x] All breakpoints Complete
ABL BP[%04x] Breakpoint Enabled, waiting to continue
APCB_TOKEN_UID_MEM_OVERCLOCK_FAIL_CNT = %d
Memory Overclock Failure count = %d
5APCB_TOKEN_UID_GNB_SMU_LN2_MODE is %x
Clear CMOS and load default APCB
Memory error occurs with default APCB
Reset system due to Memory Overclock failure
SMN0x%x: Func%d PCIe%d PCIE_LC_STATE0 = 0x%x
B%dD%dF%d DID/VID=0x%x
========= DumpMpioShareMemory Start =========
sharedMem->version = 0x%x
sharedMem->client_version = 0x%x
sharedMem->link_count = 0x%x
sharedMem->link_start = 0x%x
MAX_ASK_SLOT_IN_SHARED_MEMORY = %d
DESC:
sharedMem->links[%d].desc.startLaneIndex = 0x%x
sharedMem->links[%d].desc.numberOfLanes = 0x%x
sharedMem->links[%d].desc.linkStatus = 0x%x
sharedMem->links[%d].desc.ctrlType = 0x%x
sharedMem->links[%d].desc.gpioHandle = 0x%x
sharedMem->links[%d].desc.channelType = 0x%x
sharedMem->links[%d].desc.ancillaryDataIdx = 0x%x
STATE:
sharedMem->links[%d].status.state = 0x%x
sharedMem->links[%d].status.speed = 0x%x
sharedMem->links[%d].status.width = 0x%x
sharedMem->links[%d].status.port = 0x%x
sharedMem->links[%d].status.padding = 0x%x
ATTR:
sharedMem->links[%d].link_attributes.pcie.portPresent = 0x%x
========= DumpMpioShareMemory End ==========
FchProm21CheckLoadFwStatus Ready (%x) @loop %d takes %d(ms)
FchProm21EarlyInit Entry
Svc Load status %x
FchProm21EarlyInit End
FchProm21LoadFw Entry
PT is in RAM code, don't have to Load Fw
PT FW Ram Address = 0x%08X
PT FW Size = 0x%08X
PT FW Ram Checksum = 0x%08X
PT FW Cal Checksum = 0x%08X
PT FW checksum fail ! !
Digital Signature Offset 0x%X = 0x%X
Pure firmware Offset 0x%X = 0x%X
Loop UsbSts: 0x%X
Write the first 64K FW data to RAM
Write the Second 64K FW data to RAM
DSResult(0x1A51C)= 0x%X
After fw loading- Loop UsbSts: 0x%X
Parameter(0x15041)= 0x%X
FchProm21LoadFW END (%d)
F<F1FHF
1F"FHF
FchProm21LoadFwDoneNew Ready (%x) @loop %d takes %d(ms)
FchProm21ResourceInit
Program Root bridge:
RootPortDev 0x%x, func 0x%x, Offset(0x0) = 0x%x
RootPortDev 0x%x, func 0x%x, Offset(0x4) = 0x%x
RootPortDev 0x%x, func 0x%x, Offset(0x18) = 0x%x
RootPortDev 0x%x, func 0x%x, Offset(0x20) = 0x%x
Program temp bus for pt usp:
PtTempUsp 0x%x, 0, 0, Offset(0x0) = 0x%x
PtTempUsp 0x%x, 0, 0, Offset(0x4) = 0x%x
PtTempUsp 0x%x, 0, 0, Offset(0x18) = 0x%x
PtTempUspBus 0x%x, 0, 0, Offset(0x20) = 0x%x
Program temp bus for pt dsp:
PtTempDsp 0x%x, 0, 0, Offset(0x0) = 0x%x
Program pci reg for pt dsp 12:
PtTempDsp 0x%x, 12, 0, Offset(0x0) = 0x%x
PtTempDsp 0x%x, 12, 0, Offset(0x4) = 0x%x
PtTempDsp 0x%x, 12, 0, Offset(0x18) = 0x%x
PtTempDsp 0x%x, 12, 0, Offset(0x20) = 0x%x
PtXhciDev 0x%x, 0, 0, Offset(0x0) = 0x%x
PtXhciDev 0x%x, 0, 0, Offset(0x4) = 0x%x
PtXhciDev 0x%x, 0, 0, Offset(0x10) = 0x%x
FchProm21ResourceInit END
RootPortDev 0x%x, func 0x%x, Offset(0x18) = 0x%x
PtXhciDev 0x%x, 0, 0, Offset(0x0) = 0x%x
PtXhciDev 0x%x, 0, 0, Offset(0x4) = 0x%x
PtXhciDev 0x%x, 0, 0, Offset(0x10) = 0x%x
Clear pci reg for pt dsp 12:
PtTempDsp 0x%x, 12, 0, Offset(0x0) = 0x%x
PtTempDsp 0x%x, 12, 0, Offset(0x4) = 0x%x
PtTempDsp 0x%x, 12, 0, Offset(0x18) = 0x%x
PtTempDsp 0x%x, 12, 0, Offset(0x20) = 0x%x
Clear temp bus for pt usp:
PtTempUsp 0x%x, 0, 0, Offset(0x4) = 0x%x
PtTempUsp 0x%x, 0, 0, Offset(0x18) = 0x%x
PtTempUspBus 0x%x, 0, 0, Offset(0x20) = 0x%x
Clear Root bridge:
RootPortDev 0x%x, func 0x%x, Offset(0x0) = 0x%x
RootPortDev 0x%x, func 0x%x, Offset(0x4) = 0x%x
RootPortDev 0x%x, func 0x%x, Offset(0x20) = 0x%x
FchProm21ResourceRestore END
FchProm21XhciReadByte 0x%x = 0x%x
FchProm21XhciWriteByte 0x%X Addr = 0x%x, Data = 0x%x
!IT"hF
enabled
disabled
biosramen:%s
Enable accessing bios ram.
AB Recovery flag in biosram :%X
Disable accessing bios ram.
$(p F8
GnbEarlyDeviceEnable Entry
allocate resource for WLAN
Scan PT21 Downstream ports...
no WLAN device
GnbEarlyDeviceEnable Exit
no MpmEvent
GnbEarlyLinkTraining Entry
APCB_TOKEN_UID_BMC_START_LANE = %d
APCB_TOKEN_UID_BMC_END_LANE = %d
Train 2nd link for WLan
APCB_TOKEN_UID_SECOND_PCIE_LINK_START_LANE = %d
; APCB_TOKEN_UID_SECOND_PCIE_LINK_END_LANE = %d
M APCB_TOKEN_UID_MPM_WLAN_POWEREN_CONTROL = %d
APCB_TOKEN_UID_MPM_WLAN_POWEREN_CMDSTSPORT = 0x%x
APCB_TOKEN_UID_MPM_WLAN_POWEREN_DATAPORT = 0x%x
L APCB_TOKEN_UID_MPM_WLAN_POWEREN_OFFSET = 0x%x
[] APCB_TOKEN_UID_MPM_WLAN_POWEREN_MASK = 0x%x
APCB_TOKEN_UID_MPM_WLAN_POWEREN_DATA = 0x%x
Power off WLAN
delay 10ns......
Power on WLAN
APCB_TOKEN_UID_MPM_WLAN_POWEREN_GPIOPIN = 0x%x
4 APCB_TOKEN_UID_MPM_WLAN_POWEREN_IOMUXEN = 0x%x
Set FCH GPIO IOMUX enabled
FCH GPIO WLAN Power Reset Delay = %d ms
FCH GPIO WLAN Power Reset Delay 50 ms
FCH GPIO WLAN: Delay 60 ms from wlan power on to wlan PERST
APCB_TOKEN_UID_WIRELESS_MANAGEABILITY value %x
APCB_TOKEN_UID_MPM_WLAN_IOEXPANDER_GPIO_GROUP value %x
APCB_TOKEN_UID_MPM_WLAN_IOEXPANDER_GPIO_VALUE_MASK value %x
IoExpander group 1 Wlan power off......
delay 50us......
Wlan power on......
APCB_TOKEN_UID_BMC_LINK_SPEED = %d
APCB_TOKEN_UID_SECOND_PCIE_LINK_SPEED = %d
APCB_TOKEN_UID_BMC_GEN2_TX_DEEMPHASIS = %d
cfY APCB_TOKEN_CONFIG_PCIE_RESET_GPIO_PIN = %x
APCB_TOKEN_UID_BMC_DEVICE = %x
APCB_TOKEN_UID_BMC_FUNCTION = %x
Configure Bixby engine
Configure Second engine
Kill speed greater than Gen2
Svc_EnableSmuDramPaging Status = %x
APCB_TOKEN_UID_MPM_WLAN_IOEXPANDER_SLAVE_ADDRESS not found
APCB_TOKEN_UID_MPM_WLAN_IOEXPANDER_GPIO_GROUP not found
APCB_TOKEN_UID_MPM_WLAN_IOEXPANDER_GPIO_VALUE_MASK not found
IoExpander group 0 Wlan power off......
G"LiF F
GnbEarlySdpUnitIDInit Entry
Offset(0x68) = 0x%x
under Wrapper#%d Port#%d address is 0:%x:%x
Found a matched device VenId - %x, DevId - %x, ClassCode - %x
Check next device
Offset(0x68) = 0x%x
Offset(0x18) = 0x%x
RootPort DID/VID = 0x%x
Downstream switch is present
PT DID/VID = 0x%x
Bus%d D0F0 Did/Vid = 0x%x
under Wrapper#%d Port#%d address is B%x:D%x:F%x
Found a matched device VenId - %x, DevId - %x, ClassCode - %x
Check next device...
WLAN BAR%02x : Claim size = 0x%x
RP Bridge(B%d D%d F%d), Offset(0x1C) = 0x%x
RP Bridge(B%d D%d F%d), Offset(0x20) = 0x%x
RP Bridge(B%d D%d F%d), Offset(0x24) = 0x%x
RP Bridge(B%d D%d F%d), Offset(0x4) = 0x%x
PT Upstream(B%d D0 F0), Offset(0x20) = 0x%x
PT Upstream(B%d D0 F0), Offset(0x4) = 0x%x
PT Downstream(B%d D0 F0), DID/VID = 0x%x
PT Bridge(B%d D%d F0), DID/VID = 0x%x
PT Bridge(B%d D%d F0), Offset(0x18) = 0x%x
PT Bridge(B%d D%d F0), Offset(0x1C) = 0x%x
PT Bridge(B%d D%d F0), Offset(0x20) = 0x%x
PT Bridge(B%d D%d F0), Offset(0x24) = 0x%x
PT Bridge(B%d D%d F0), Offset(0x4) = 0x%x
WLAN(B%d D0 B0), Offset(0x4) = 0x%x
0x%08x
VBL Data Config Entry
TOM2 is %x0000
TOM1 is %x
NB_TOP_OF_DRAM_SLOT1 is %x
NB_LOWER_TOP_OF_DRAM2 is %x
NB_UPPER_TOP_OF_DRAM2 is %x
Save the NB TOP of DRAM to SRAM for S3 resume
Allocate done
DisplayConnect->usDeviceTag %x
W DP_dphy_tx_vboost_lvl[%x]: %x
W DP_dphy_tx_term_ctrl[%x]: %x
W ConfigMemsizeValue: %x
W FbOffsetValue: %x
W FbTopValue: %x
After:UmabaseAddrLo address: %x
After BB:UmabaseAddrHi address: %x
After BB:UmabaseAddrLo address: %x
SysInfoBuffer Address: %x
SystemInfoHeap Address: %x
DP_Combo_Phy_To_SMU Value:%x
Send message PSPSMC_MSG_SetPhyTxVboostAndTerm: Value:%x
Found APCB_TOKEN_UID_GPU_TRANSLATION_CACHE == %d
Enable GPU Host Translation
Svc_EnableGpuHostTranslation 0x%x
GPU Host Translation token not found - Disable it
Disable GPU Host Translation
No UMA found - disable IGPU
GnbVBLInitAblS0i3 Entry
Found APCB_TOKEN_UID_GPU_TRANSLATION_CACHE == %d
Enable GPU Host Translation
Offset :0x%x PciRegData 0x%x
EP BAR - 0x%x, IO space base 0x%x, length 0x%x
EP BAR - 0x%x, MMIO space base 0x%x, length 0x%x
BAR: 0x%x Data: 0x%x
Bridge, IO space base/limit 0x%x
Bridge, Memory space base/limit 0x%x
Bridge, Prefetchable Memory space base/limit 0x%x
[TP:%08x]
ASSERT on File[%x] Line[%x]
0hSF*FYF
0h*FYF
*F0hYF K
REMOTE ASSERT on %d:%d File[%x] Line[%x]
^I3F(hDh
(h[O9F
(hC!Cj
`B!(hjFCj
(hB!jFCj
8ha!jFCj
a!EFjF
PeakMap : %x
PeakCnt : %d
RepeatCnt : %d
TimeInterval : %d
usDeviceTag = 0x%x
usDeviceACPIEnum = 0x%x
usDeviceConnector = 0x%x
ucExtAUXDDCLutIndex = 0x%x
ucExtHPDPINLutIndex = 0x%x
usExtEncoderObjId = 0x%x
ucChannelMapping = 0x%x
ucChPNInvert = 0x%x
usCaps = 0x%x
NFMF#F
MemOcErrorType = %x
Override default beep table PeakMap = %x PeakAttr = %x
ABL General S3 ABL Complete Loaded
ABL General S3 ABL Complete Started
ABL General S3 ABL Complete Completed
ABL General S3 ABL Complete Completed
Could Not Locate Error Out Indicator Opcode Table
MPIO DEBUG mpioInit - START
MPIO DEBUG mpioInit - END
Ps Err - unsupported Error code
Erro code - 0x%04x
[Script%s] 0x%08x (0x%08x) - Width%d
PjF9F h
G hjF9F
hAFCj
G hjF9F
$%F!F3F
LogErrorType = %x
GPIO pin : %d
GPIO GpioIoMUX : %d
GPIO GpioBankCtl : %d
v(F:F1F
[ScriptExecute] ExecuteScript - 0x%08x, OpCode - 0x%04x
[ScriptExecute] Done
[ScriptExecuteStall] - 0x%08x
FchPciWrite
[ScriptExecuteIoPoll] - 0x%08x, 0x%08x, 0x%08x
IoRead
[Script%s] 0x%08x - Width%d
IoWrite
MmioWrite
EARLY LINK get share memory address failed
IoMux: 0x%08x
Set GPIO Pin: %d De-assert PCIE reset: 0x%08x
WirelessManageabilityAfterDeviceInit Entry
AgesaBootMode: 0x%x
APCB_TOKEN_UID_MPM_ENABLE value: 0x%x
APCB_TOKEN_UID_MPM_ENABLE not found
Force MPM to disabled.
MpmEnableType value is illegal.
WirelessManageabilityAfterDeviceInit Exit
jF h9F
G hjF9F
hAFCj
G hjF9F
hAFCj
G hjF9F
In function Destination = 0x%x
MPIO DEBUG Svc_SendCmdToMpio() returned error: %d
MPIO DEBUG mpioSharedMemory base = 0x%X.
DestinationAddress: 0x%x
MPIO_E32_PHY_DATA_SIZE: 0x%x
MPIO DEBUG Svc_SendCmdToMpio() returned error: %d
PSP_CMD_UPDATE_CONFIG svcStatus : 0x%x
APCB Value WM:0x%x KvmWired:0x%x KvmWireless:0x%x SystemProvisioned:0x%x AcGpioIndex:%d WlanGpioIndex:%d EcAbsent:0x%x
SVC Call Config 0x%x, AcGpioIndex %d, WlanBdf 0x%x, WlanMmioAddr 0x%x
sharedMem->links[%d].link_attributes.pcie.maxLinkSpeedCap = 0x%x
sharedMem->links[%d].link_attributes.pcie.targetLinkSpeed = 0x%x
sharedMem->links[%d].link_attributes.pcie.devfuncnumber = 0x%x
PSP_CMD_SETUP_LINK mpioResp %d Status=0x%x, resp1=0x%x, resp2=0x%x
Set IOMUX data APCB_TOKEN_UID_MPM_WLAN_POWEREN_IOMUXDATA = 0x%x
GPIOValue should be 1 or 0, APCB_TOKEN_UID_MPM_WLAN_POWEREN_GPIODATA = 0x%x
GPIO27 is specific, we have to clear output enable and value to keep it high in S5
FCH GPIO WLAN: Delay %d ms from wlan power on to wlan PERST(APCB Token)
allocate resource for WLAN(B%d D0 F0) under PT21(Location:B%d D%d F%d)
MPIO DEBUG PSP_CMD_INIT_CONFIG Response: resp1=0x%X resp2=0x%X
MPIO DEBUG ===================================================================
Retrieve the E32PHYAddress for S3 resume path E32PHYAddress = %x (Status %x)
MPIO DEBUG mpioInit - ERROR: mpioSharedMemory is not available!
ABL - Debug Error info, MajorError: %x, MinorError.SocketCount: %x
ABL - a skip condition detected - this is not an error, Minor Condition: %x, DataA: %x, DataB: %x
ABL - a FATAL Error has been detected, Minor Error: %x, DataA: %x, DataB: %x
ABL - an Error has been detected, Minor Error: %x, DataA: %x, DataB: %x
ABL - an Over Clocking FATAL Error has been detected, Minor Error: %x, DataA: %x, DataB: %x
Set Digital Signature Parameter 2 Offset 0x%08X = 0x%X -> Parameter2_offset = 0x%08X
Failed to unmap APCB
[ScriptTableDispatcher] TableBase - 0x%08x, OpCode - 0x%04x, TableLength - 0x%08x
@ABCabf./NO